frequency at a submultiple of the input frequency.
The output frequency
is
slightly greater than the resonant frequency of the oscillator's tuned circuit.
4-3.
REGENERATIVE FREQUENCY-DIVIDER CIRCUIT
a. General. The divider shown in figure 4-2 is driven at a frequency of 1 MHz
and produces an output frequency of 100 kHz.
The circuit is stable and reliable
and, if properly adjusted, will not oscillate in the absence of an input.
The
phase stability is good and the operating bandwidth is such that excessively close
tolerances in the tuned circuit need not be maintained.
b. Circuit Operation.
Transistor Q1 is a mixer that receives an input of 0.7
volt rms at an input frequency of 1 MHz from an external source. The output of the
mixer is at 100 kHz. The output is processed through two tripler stages to produce
an output of 900 kHz. This signal drives the emitter of Q1 to produce a frequency
difference of 100 kHz, which is selected by means of a tapped tuned circuit. The
resistor connected in series with the collector of the transistor is used to
suppress a form of negative resistance oscillation that is encountered with high-
frequency junction transistors when bottoming occurs.
It also serves the very
useful function of limiting the peak collector current to a satisfactory value.
Tripler stage Q2 is driven from a capacitive tap on the 100-kHz tuned circuit
through a series-isolating resistor which also helps to prevent very high frequency
parasitics.
The second tripler, Q3, produces the 900-kHz frequency required for
the mixer.
The output amplifier, Q4, is driven by the mixer output, and has
sufficient gain to deliver 20 milliwatts to a 50-ohm load.
The resistor, across
the tuned circuit of Q4, stabilizes the amplifier and also prevents an excessively
high voltage from being developed at this point in absence of a load.
The
frequency multiplier stages and the output amplifier also contain series-collector
resistors for the reasons given above.
c. Alignment. The alignment of the divider is best accomplished by driving the
base of each transistor separately at the frequency of the collector tuned circuit.
The tuned circuit is then adjusted for maximum response while the input is
decreased, if necessary, to avoid limiting.
An input of 0.7 volt rms at 1 MHz
should then be applied to Q1; the system should oscillate and, as a final step,
each tuned circuit should be adjusted to the center of the range over which correct
operation is desired.
When properly adjusted, the divider should work as the
supply is varied from 5 to 40 volts. Increasing the voltage beyond 40 may cause
transistor damage, and should not be attempted. The output should be zero in the
absence of an input, except for a small amount of noise. The operating bandwidth
should be at least 2 percent at the middle of the supply voltage range.
Section II.
TRANSMITTER
4-4.
GENERAL
The transmitter illustrated in figure 4-3 is a simplified transistorized version
of the one illustrated in figure 100 of TM 11-668.
The transmitter comprises
circuits that were studied in previous lessons, with the exception of the AFC
circuit.
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